An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected Generator Systems


Vol. 17, No. 4, pp. 1004-1013, Jul. 2017
10.6113/JPE.2019.17.4.1004


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 Abstract

This paper presents an interleaving scheme for parallel-connected power systems to reduce the DC-link current ripple. A paralleled generator system generates current ripple by the Pulse Width Modulation (PWM) of each generator side converter. The current ripple in the DC-link degrades the efficiency of the whole generator system and decreases the lifetime of the DC-link capacitors. To mitigate these issues, the expression of the DC-link current is derived by a double-integral Fourier analysis while considering the modulation schemes. Optimized interleaving angles for the parallel generator system are obtained based on an analysis to minimize the dominant current harmonics component. Finally, the proposed interleaving scheme reduces the RMS value of the DC-link current ripple. Simulation and experimental results verify the effectiveness of the proposed interleaving scheme.


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Cite this article

[IEEE Style]

M. Jeong, H. U. Shin, J. Baek, K. Lee, "An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected Generator Systems," Journal of Power Electronics, vol. 17, no. 4, pp. 1004-1013, 2017. DOI: 10.6113/JPE.2019.17.4.1004.

[ACM Style]

Min-Gyo Jeong, Hye Ung Shin, Ju-Won Baek, and Kyo-Beum Lee. 2017. An Interleaving Scheme for DC-link Current Ripple Reduction in Parallel-Connected Generator Systems. Journal of Power Electronics, 17, 4, (2017), 1004-1013. DOI: 10.6113/JPE.2019.17.4.1004.

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  ISSN : 1598 - 2092
eISSN : 2093 - 4718