Design of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks and Control for High Performance

This paper proposes a practical design for a Cascaded H-Bridge Multilevel (CHBM) inverter based on Power Electronics Building Blocks (PEBB) and high performance control to improve current control and increase fault tolerance. It is shown that the expansion and modularization characteristics of the CHBM inverter are improved since the individual inverter modules operate more independently, when using the PEBB concept. It is also shown that the performance of current control can be improved with voltage delay compensation and the fault tolerance can be increased by using unbalance three-phase control. The proposed design and control methods are described in detail and the validity of the proposed system is verified experimentally in various industrial fields.

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Cite this article

[IEEE Style]

Y. Park, H. Ryu, H. Lee, M. Jung, S. Lee, "Design of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks and Control for High Performance," Journal of Power Electronics, vol. 10, no. 3, pp. 262-269, 2010. DOI: 10.6113/JPE.2010.10.3.262.

[ACM Style]

Young-Min Park, Han-Seong Ryu, Hyun-Won Lee, Myung-Gil Jung, and Se-Hyun Lee. 2010. Design of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks and Control for High Performance. Journal of Power Electronics, 10, 3, (2010), 262-269. DOI: 10.6113/JPE.2010.10.3.262.