Optimized Space Vector Pulse-width Modulation Technique for a Five-level Cascaded H-Bridge Inverter

Amarendra Matsa; Irfan Ahmed; Madhuri A. Chaudhari

Optimized Space Vector Pulse-width Modulation Technique for a Five-level Cascaded H-Bridge Inverter

Amarendra Matsa

Irfan Ahmed

Madhuri A. Chaudhari

Vol. 14, No. 5, pp. 937-945, Sep. 2014

10.6113/JPE.2014.14.5.937

Five-level cascaded H-bridge inverter

Optimized SVPWM

Power electronics

Space vector pulse-width modulation (SVPWM)

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Abstract

This paper presents an optimized space vector pulse-width modulation (OSVPWM) technique for a five-level cascaded H-bridge(CHB) inverter. The space vector diagram of the five-level CHB inverter is optimized by resolving it into inner and outer two-levelspace vector hexagons. Unlike conventional space vector topology, the proposed technique significantly reduces the involvedcomputational time and efforts without compromising the performance of the five-level CHB inverter. A further optimized(FOSVPWM) technique is also presented in this paper, which significantly reduces the complexity and computational efforts. Thedeveloped techniques are verified through MATLAB/SIMULINK. Results are compared with sinusoidal pulse-width modulation(SPWM) to prove the validity of the proposed technique. The proposed simulation system is realized by using an XC3S400field-programmable gate array from Xilinx, Inc. The experiment results are then presented for verification.

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Cite this article

[IEEE Style]

A. Matsa, I. Ahmed, M. A. Chaudhari, "Optimized Space Vector Pulse-width Modulation Technique for a Five-level Cascaded H-Bridge Inverter," Journal of Power Electronics, vol. 14, no. 5, pp. 937-945, 2014. DOI: 10.6113/JPE.2014.14.5.937.

[ACM Style]

Amarendra Matsa, Irfan Ahmed, and Madhuri A. Chaudhari. 2014. Optimized Space Vector Pulse-width Modulation Technique for a Five-level Cascaded H-Bridge Inverter. Journal of Power Electronics, 14, 5, (2014), 937-945. DOI: 10.6113/JPE.2014.14.5.937.