Scheme for Reducing Harmonics in Output Voltage of Modular Multilevel Converters with Offset Voltage Injection


Vol. 19, No. 6, pp. 1496-1504, Nov. 2019
10.6113/JPE.2019.19.6.1496


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 Abstract

This paper proposes a new THD reduction algorithm for modular multilevel converters (MMCs) with offset voltage injection operated in nearest level modulation (NLM). High voltage direct current (HVDC) is actively introduced to the grid connection of offshore wind powers, and this paper deals with a voltage generation technique with an MMC for wind power generation. In the proposed method, third harmonic voltage is added for reducing the THD. The third harmonic voltage is adjusted so that each of the pole voltage magnitudes maintains a constant value with a maximum number of (N+1) levels, where N is the number of sub-modules per arm. By using the proposed method, the THD of the output voltage is mitigated without increasing the switching frequency. In addition, the proposed method has advantageous characteristics such as simple implementation. As a part of this study, this paper compares the THD results of the conventional method and the proposed method with offset voltage injection to reduce the THD. In this paper, simulations have been carried out to verify the effectiveness of the proposed scheme, and the proposed method is implemented by a HILS (Hardware in the Loop Simulation) system. The obtained results show agreement with the simulation results. It is confirmed that the new scheme achieved the maximum level output voltage and improved the THD quality.


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Cite this article

[IEEE Style]

D. Anupom, D. Shin, D. Lee, "Scheme for Reducing Harmonics in Output Voltage of Modular Multilevel Converters with Offset Voltage Injection," Journal of Power Electronics, vol. 19, no. 6, pp. 1496-1504, 2019. DOI: 10.6113/JPE.2019.19.6.1496.

[ACM Style]

Devnath Anupom, Dong-Cheol Shin, and Dong-Myung Lee. 2019. Scheme for Reducing Harmonics in Output Voltage of Modular Multilevel Converters with Offset Voltage Injection. Journal of Power Electronics, 19, 6, (2019), 1496-1504. DOI: 10.6113/JPE.2019.19.6.1496.