Hardware implementation for hybrid active NPC converters using FPGA‑based dual pulse width modulation


Vol. 21, No. 11, pp. 1669-1679, Nov. 2021
10.1007/s43236-021-00305-w




 Abstract

Recent developments in power electronics technologies have resulted in a need for fast responses and dynamic control. However, existing control schemes are still limited to the available digital signal processors (DSPs) and their associated high prices. The field-programmable gate array (FPGA) offers fast performance and high control flexibility by providing a reconfigurable computing speed. However, it has some implementation limitations in standalone systems. In this regard, this paper presents a hardware setup for a three-level hybrid active neutral point inverter (HANPC) using a FPGA and a DSP. A unique method using digital and analog modulation is designed in this study using Vivado software. The proposed method depends on receiving analog reference signals from the DSP and then performing all the required processes using the FPGA. Direct pulse width modulation is generated to control the HANPC without changing the hardware configuration of the main topology. The implemented hardware is based on a 15 kW HANPC topology that is mainly controlled by a Digilent Zybo-Z7-20 FPGA. The effectiveness of the proposed system was verified by experimental results.


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Cite this article

[IEEE Style]

L. M. Halabi, I. M. Alsofyani and K. Lee, "Hardware implementation for hybrid active NPC converters using FPGA‑based dual pulse width modulation," Journal of Power Electronics, vol. 21, no. 11, pp. 1669-1679, 2021. DOI: 10.1007/s43236-021-00305-w.

[ACM Style]

Laith M. Halabi, Ibrahim Mohd Alsofyani, and Kyo-Beum Lee. 2021. Hardware implementation for hybrid active NPC converters using FPGA‑based dual pulse width modulation. Journal of Power Electronics, 21, 11, (2021), 1669-1679. DOI: 10.1007/s43236-021-00305-w.