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Search: "[ keyword: PWM ]" (234)
An Optimal Random Carrier Pulse Width Modulation Technique Based on a Genetic Algorithm
Jie Xu  Zi-Ling Nie  Jun-Jie Zhu
Vol. 17, No. 2, pp. 380-388, Mar. 2017
10.6113/JPE.2019.17.2.380
An Improved Switching Topology for Single Phase Multilevel Inverter with Capacitor Voltage Balancing Technique
Soundar Rajan Ponnusamy  Manoharan Subramaniam  Gerald Christopher Raj Irudayaraj  Kaliamoorthy Mylsamy
Vol. 17, No. 1, pp. 115-126, Jan. 2017
10.6113/JPE.2019.17.1.115
Non-equal DC link Voltages in a Cascaded H-Bridge with a Selective Harmonic Mitigation-PWM Technique Based on the Fundamental Switching Frequency
Amirhossein Moeini  Hossein Iman-Eini  Mohammad Najjar
Vol. 17, No. 1, pp. 106-114, Jan. 2017
10.6113/JPE.2019.17.1.106
A New Active Zero State PWM Algorithm for Reducing the Number of Switchings
Sang-Won Yun  Jae-Hyuk Baik  Dong-Sik Kim  Ji-Yoon Yoo
Vol. 17, No. 1, pp. 88-95, Jan. 2017
10.6113/JPE.2019.17.1.88
A New Method for Elimination of Zero-Sequence Voltage in Dual Three-Level Inverter Fed Open-End Winding Induction Motors
Yi-Wen Geng  Chen-Xi Wei  Rui-Cheng Chen  Liang Wang  Jia-Bin Xu 
Shuang-Cheng Hao
Vol. 17, No. 1, pp. 67-75, Jan. 2017
10.6113/JPE.2019.17.1.67
Performance Analysis and Comparison of Post-Fault PWM Rectifiers Using Various Space Vector Modulation Methods
Chong Zhu  Zhiyong Zeng  Rongxiang Zhao
Vol. 16, No. 6, pp. 2258-2271, Nov. 2016
10.6113/JPE.2016.16.6.2258
A Study of the SPWM High-Frequency Harmonic Circulating Currents in Modular Inverters
Sheng Xu  Zhendong Ji
Vol. 16, No. 6, pp. 2119-2128, Nov. 2016
10.6113/JPE.2016.16.6.2119
A Neutral-Point Voltage Balance Controller for the Equivalent SVPWM Strategy of NPC Three-Level Inverters
Jianguo Lyu  Wenbin Hu  Fuyun Wu  Kai Yao  Junji Wu

Vol. 16, No. 6, pp. 2109-2118, Nov. 2016
10.6113/JPE.2016.16.6.2109
A Novel Modulation Scheme and a DC-Link Voltage Balancing Control Strategy for T-Type H-Bridge Cascaded Multilevel Converters
Yue Wang  Yaowei Hu  Guozhu Chen
Vol. 16, No. 6, pp. 2099-2108, Nov. 2016
10.6113/JPE.2016.16.6.2099
A Wide Input Range, 95.4% Power Efficiency DC-DC Buck Converter with a Phase-Locked Loop in 0.18 μm BCD
Hongjin Kim  Young-Jun Park  Ju-Hyun Park  Ho-Cheol Ryu  Young-Gun Pu 
Minjae Lee  Keumcheol Hwang  Younggoo Yang  Kang-Yoon Lee
Vol. 16, No. 6, pp. 2024-2034, Nov. 2016
10.6113/JPE.2016.16.6.2024

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  ISSN : 1598 - 2092
eISSN : 2093 - 4718