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Power Loss and Junction Temperature Analysis in the Modular Multilevel Converters for HVDC Transmission Systems
Haitian Wang Guangfu Tang Zhiyuan He Junzheng Cao
Vol. 15, No. 3, pp. 685-694, May 2015
10.6113/JPE.2015.15.3.685
Vol. 15, No. 3, pp. 685-694, May 2015
![](https://d2kjln74dkk4oj.cloudfront.net/img/ft_doi.png)
An Improved Carrier-based SVPWM Method By the Redistribution of Carrier-wave Using Leg Voltage Redundancies in Generalized Cascaded Multilevel Inverter
Dae-Wook Kang Yo-Han Lee Bum-Seok Suh Chang-Ho Choi Dong-Seok Hyun
Vol. 1, No. 1, pp. 36-47, Apr. 2001
10.6113/JPE.2001.1.1.36
Vol. 1, No. 1, pp. 36-47, Apr. 2001
![](https://d2kjln74dkk4oj.cloudfront.net/img/ft_doi.png)
Soft-Switching T-Type Multilevel Inverter
Tianyu Chen Mehdi Narimani
Vol. 19, No. 5, pp. 1182-1192, Sep. 2019
https://doi.org/10.6113/JPE.2019.19.5.1182
Vol. 19, No. 5, pp. 1182-1192, Sep. 2019
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Comparison of Capacitor Voltage Balancing Methods for 1GW MMC-HVDC Based on Real-Time Digital Simulator and Physical Control Systems
Jun-Min Lee Jung-Woo Park Dae-Wook Kang Jong-Pil Lee Dong-Wook Yoo
Jang-Myung Lee
Vol. 19, No. 5, pp. 1171-1181, Sep. 2019
https://doi.org/10.6113/JPE.2019.19.5.1171
Jang-Myung Lee
Vol. 19, No. 5, pp. 1171-1181, Sep. 2019
![](https://d2kjln74dkk4oj.cloudfront.net/img/ft_doi.png)
Design and Verification of Improved Cascaded Multilevel Inverter Topology with Asymmetric DC Sources
Tarmizi Tarmizi Soib Taib M. K. Mat Desa
Vol. 19, No. 5, pp. 1074-1086, Sep. 2019
https://doi.org/10.6113/JPE.2019.19.5.1074
Vol. 19, No. 5, pp. 1074-1086, Sep. 2019
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Discontinuous PWM Scheme for Switching Losses Reduction in Modular Multilevel Converters
Min-Gyo Jeong Seok-Min Kim June-Seok Lee Kyo-Beum Lee
Vol. 17, No. 6, pp. 1490-1499, Nov. 2017
10.6113/JPE.2019.17.6.1490
Vol. 17, No. 6, pp. 1490-1499, Nov. 2017
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Improving the Solution Range in Selective Harmonic Mitigation Pulse Width Modulation Technique for Cascaded Multilevel Converters
Mohammad Najjar Hossein Iman-Eini Amirhossein Moeini Shahrokh Farhangi
Vol. 17, No. 5, pp. 1186-1194, Sep. 2017
10.6113/JPE.2019.17.5.1186
Vol. 17, No. 5, pp. 1186-1194, Sep. 2017
![](https://d2kjln74dkk4oj.cloudfront.net/img/ft_doi.png)
A New Single Phase Multilevel Inverter Topology with Two-step Voltage Boosting Capability
Tapas Roy Pradip Kumar Sadhu Abhijit Dasgupta
Vol. 17, No. 5, pp. 1173-1185, Sep. 2017
10.6113/JPE.2019.17.5.1173
Vol. 17, No. 5, pp. 1173-1185, Sep. 2017
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Increasing the Range of Modulation Indices with the Polarities of Cells and Switching Constraint Reliefs for the Selective Harmonic Elimination Pulse Width Modulation Technique
Mohammad Najjar Hossein Iman-Eini Amirhossein Moeini
Vol. 17, No. 4, pp. 933-941, Jul. 2017
10.6113/JPE.2019.17.4.933
Vol. 17, No. 4, pp. 933-941, Jul. 2017
![](https://d2kjln74dkk4oj.cloudfront.net/img/ft_doi.png)
A Novel Analytical Method for Selective Harmonic Elimination Problem in Five-Level Converters
Farzad Golshan Adib Abrishamifar Mohammad Arasteh
Vol. 17, No. 4, pp. 914-922, Jul. 2017
10.6113/JPE.2019.17.4.914
Vol. 17, No. 4, pp. 914-922, Jul. 2017
![](https://d2kjln74dkk4oj.cloudfront.net/img/ft_doi.png)